1. Field of the Invention
Embodiments of the invention relate to a method of manufacturing a semiconductor device.
2. Description of the Related Art
Conventional power devices for which characteristics are enhanced and improved by introducing impurity defects (which become lifetime killers) by ion implantation using high acceleration energy have been developed. For example, in a reverse-conducting IGBT (RC-IGBT) having a structure in which an insulated gate bipolar transistor (IGBT) and a free wheeling diode (FWD) connected with the IGBT in antiparallel are integrated and built-in on a single semiconductor chip, the formation of defects that become lifetime killers in an n− -type drift region by irradiating helium (He) is commonly known.
FIGS. 11 and 12 are cross-sectional views of a structure of a conventional RC-IGBT. In the conventional RC-IGBT depicted in FIG. 11, defects 113 are formed near an interface of an n−-type drift region 101 and a p-type base region 102 by helium irradiation. The defects 113 are not only formed in a FWD region 112, but also in an IGBT region 111. The IGBT region 111 is a region in which an IGBT is arranged. The FWD region 112 is a region in which a FWD is arranged. Further, as depicted in FIG. 12, a RC-IGBT has been proposed in which defects 114 are formed only in the FWD region 112 to reduce leak current and loss in the IGBT region 111 (for example, refer to Japanese Laid-Open Patent Publication No. 2015-118991, Japanese Laid-Open Patent Publication No. 2008-192737, Japanese Laid-Open Patent Publication No. 2014-135476).
In fabricating (manufacturing) such an RC-IGBT, when a diffusion region such as an n+-type emitter region 103 or a p+-type contact region 104 is selectively formed, an impurity is implanted in a semiconductor wafer 110 by ion implantation 122 using, as a mask (shielding film), a photoresist film 121 in which portions corresponding to the regions are open (FIG. 13). FIG. 13 is a cross-sectional view schematically depicting a state when ion implantation is performed using a photoresist film. The photoresist film 121 is formed to have a thickness t101 that corresponds to the range of the impurity of the ion implantation 122, and typically, phosphorus (P), boron (B), arsenic (As), or the like is implanted by the ion implantation 122. Further, the photoresist film 121 is removed by ashing after the ion implantation 122.
Further, Japanese Laid-Open Patent Publication No. 2008-192737 (paragraphs 0025 to 0027) discloses a mask having openings only at a portion corresponding to the FWD region is used to selectively irradiate helium to a predetermined depth in a semiconductor wafer. Japanese Laid-Open Patent Publication No. 2014-135476 (paragraph 0045) discloses that a photoresist film having a predetermined pattern is used as a shielding film to selectively irradiate helium into a semiconductor wafer. Further, a method of using a hard mask 131 such as a metal mask, a silicon (Si), etc. in a case where a photoresist film for which a depth (range) of implantation (irradiation) 132 of an impurity is deep such as in helium irradiation by high acceleration energy or proton (H+) irradiation does not function as a shielding film is known (FIG. 14). Published Japanese-Translation of PCT Application, Publication No. 2011-503889 (paragraphs 0055, 0058, FIGS. 7, 8) disclose that in a RC-IGBT, a thickness of a first mask 14 is increased by introducing a second mask 15 that is a resist mask and hydrogen or helium ion implantation is performed regionally.
FIGS. 14 and 15 are cross-sectional views during ion implantation using a hard mask as a mask. As depicted in FIG. 14, when the hard mask 131 is used as a shielding film in ion implantation of an impurity, the semiconductor wafer 110 and the hard mask 131 are aligned using, as a reference, a mark for alignment pre-formed on the semiconductor wafer 110 and both are fixed by, for example, a clip or screw (not depicted) so that facing main surfaces are not in contact with each other. With the semiconductor wafer 110 and the hard mask 131 in a fixed state, an implantation 132 of an impurity is performed from the hard mask 131 side using a high acceleration energy, whereby a predetermined ion species impurity and defects are introduced only in a predetermined region.
For example, a state of a RC-IGBT during manufacture when the defects 114 are introduced only in the FWD region 112 by helium irradiation is depicted in FIG. 15. As depicted in FIG. 15, after element structures including the IGBT and the FWD are formed on the semiconductor wafer 110, the hard mask 131 is fixed to the semiconductor wafer 110 by, for example, clips, screws (not depicted), etc., so as to face a rear surface (surface on a p+-type collector region 105 side) of the semiconductor wafer 110. The hard mask 131 is used as a mask to irradiate helium from the rear surface of the semiconductor wafer 110, whereby the defects 114 are introduced into only the FWD region 112 by irradiating helium from an opening 131a of the hard mask 131.